What are the responsibilities and job description for the Staff RTL Engineer, Ingress/Egress position at Eridu AI?
About Eridu AI
Eridu AI is a Silicon Valley-based hardware startup pioneering infrastructure solutions that accelerate training and inference for large-scale AI models. Today’s AI performance is frequently limited by system-level bottlenecks. Eridu AI delivers multiple industry-first innovations across semiconductors, software, and systems to unlock greater GPU utilization, reduce capital and power costs, and maximize data center efficiency. The company’s solutions and value proposition have been validated by several leading hyperscalers.
The company is led by a veteran team of Silicon Valley executives and engineers with decades of experience in state-of-the-art semiconductors, optics, software, and systems, including serial entrepreneur Drew Perkins, co-founder of Infinera (NASDAQ: INFN), Lightera (acq. by Ciena), Gainspeed (acq. by Nokia) and Mojo Vision (World’s leading micro-LED company and developer of the first augmented reality contact lens).
Position Overview
We are seeking an RTL Engineer to help define and implement our industry-leading Networking IC. If you're a highly motivated self-starter eager to solve real-world problems, this is a unique opportunity to shape the future of AI Networking. As part of the Design Group, you will be responsible for defining, specifying, architecting, executing, and productizing cutting-edge Networking devices.
The candidate will be part of Design Group responsible for defining, specifying, architecting, executing and productizing leading-edge Networking devices.
Responsibilities
At Eridu AI, you’ll have the opportunity to shape the future of AI infrastructure, working with a world-class team on groundbreaking technology that pushes the boundaries of AI performance. Your contributions will directly impact the next generation of AI networking solutions, transforming data center capabilities.
The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles.
The Pay Range For This Role Is
210,000 - 275,000 USD per year(San Francisco Bay Area)
Eridu AI is a Silicon Valley-based hardware startup pioneering infrastructure solutions that accelerate training and inference for large-scale AI models. Today’s AI performance is frequently limited by system-level bottlenecks. Eridu AI delivers multiple industry-first innovations across semiconductors, software, and systems to unlock greater GPU utilization, reduce capital and power costs, and maximize data center efficiency. The company’s solutions and value proposition have been validated by several leading hyperscalers.
The company is led by a veteran team of Silicon Valley executives and engineers with decades of experience in state-of-the-art semiconductors, optics, software, and systems, including serial entrepreneur Drew Perkins, co-founder of Infinera (NASDAQ: INFN), Lightera (acq. by Ciena), Gainspeed (acq. by Nokia) and Mojo Vision (World’s leading micro-LED company and developer of the first augmented reality contact lens).
Position Overview
We are seeking an RTL Engineer to help define and implement our industry-leading Networking IC. If you're a highly motivated self-starter eager to solve real-world problems, this is a unique opportunity to shape the future of AI Networking. As part of the Design Group, you will be responsible for defining, specifying, architecting, executing, and productizing cutting-edge Networking devices.
The candidate will be part of Design Group responsible for defining, specifying, architecting, executing and productizing leading-edge Networking devices.
Responsibilities
- Egress/Ingress Design: Design and architect solutions for high-speed networking device, focusing on latency optimization, memory management, and quality of service (QoS) support.
- Implementation and Testing: Implement memory management designs on FPGA or ASIC platforms, ensuring compliance with industry standards and performance benchmarks. Conduct thorough testing and validation to ensure functionality and reliability.
- Performance Optimization: Analyze and optimize memory management techniques to improve performance metrics. Collaborate with hardware and software teams to achieve optimal integration.
- Protocol Support: Provide support for various networking protocols and standards related to input and output queues, including Ethernet.
- Troubleshooting and Debugging: Investigate and resolve complex issues related to packet queuing, working closely with cross-functional teams, including hardware engineers, firmware developers, and system architects.
- Documentation and Reporting: Create comprehensive documentation, including specifications, test plans, design reviews, and technical reports. Communicate findings and recommendations effectively to stakeholders.
- Master’s degree in Electrical Engineering (MSEE) with 8-15 years of experience.
- Proven expertise in designing and optimizing memory management algorithms and QoS mechanisms, for high-speed networking devices.
- Solid understanding of FPGA or ASIC design methodologies, including synthesis, simulation, and verification tools (e.g., Verilog, VHDL, Synopsys, Cadence).
- Experience with Ethernet networking protocols (e.g., IEEE 802.1Q, 802.1p, 802.1ad).
- Knowledge of IP networking protocols; experience with TCP/UDP and related protocols is a plus.
- Proficiency in scripting languages (Python, Perl, Tcl) for automation and tool development.
- Strong analytical and problem-solving abilities, with meticulous attention to detail in troubleshooting and debugging complex networking issues.
- Excellent verbal and written communication skills, with the ability to collaborate effectively in a team environment and present technical information to diverse audiences.
At Eridu AI, you’ll have the opportunity to shape the future of AI infrastructure, working with a world-class team on groundbreaking technology that pushes the boundaries of AI performance. Your contributions will directly impact the next generation of AI networking solutions, transforming data center capabilities.
The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles.
The Pay Range For This Role Is
210,000 - 275,000 USD per year(San Francisco Bay Area)
Salary : $210,000 - $275,000