Sr. Manager, ASIC Design

Credo is engineering the future of high-speed connectivity for the AI-driven world. With a deeply rooted legacy of innovation and a passion for solving the most complex networking challenges, we deliver industry-leading solutions that power the next generation of cloud, AI, and hyperscale data centers.

Credo is pioneering a systems-level approach to connectivity, integrating hardware, software, and architecture to deliver holistic solutions. This strategy not only differentiates us in the market but also creates significant value for our customers by accelerating deployment, improving performance, and reducing complexity across their infrastructure.

At Credo, you’ll be part of a team of world-class technologists and engineers that thrive on pushing the limits of what’s possible for some of the world’s most important companies. Our portfolio includes cutting edge solutions including our software, optical DSPs, PCIe/CXL products, SerDes IP, and advanced Active Electrical Cables (AECs) all designed for maximum performance, energy efficiency, and scalability.

We foster a culture of technical excellence, collaboration, and continuous learning, where your ideas can shape the future of connectivity. From silicon architects to systems engineers, every role at Credo contributes to solving real-world problems at scale.

Join us and help us architect the next generation of disruptive networking technologies — because at Credo, We Connect.

About the Role

As a Sr. Manager, ASIC Design, you will lead a team of engineers in delivering complex ASIC designs from specification to tape-out. This role covers all aspects of front-end ASIC design, including microarchitecture, RTL implementation, and verification of complex logic blocks. You will collaborate with PD, DFT, STA, and integration teams to ensure successful tape-outs and partner with system teams for chip bring-up and validation.

Responsibilities

• Lead a team of engineers to deliver chips from specification through tapeout.
• Mentor junior engineers on design methodologies, verification flows, and best practices.
• Develop and maintain detailed microarchitecture and design specifications.
• Design, implement, and debug complex logic blocks.
• Integrate and validate IPs from internal and external vendors.
• Support front-end integration activities, including Lint, CDC, synthesis, and ECO processes.
• Create functional tests and testbenches; perform RTL and gate-level verification and simulations.
• Collaborate with verification, DFT, and physical design teams to ensure successful tapeout.
• Bring up, validate, and debug functional features on silicon.
• Work closely with software, firmware, applications, and systems teams to deliver a high-quality product.

Basic Qualifications

• MS degree in EE/CS with 10 years of relevant experience.
• Deep understanding of digital logic design and complex synchronous/asynchronous interfaces.
• Proficient in Verilog/SystemVerilog RTL design.
• Knowledge of synthesis and static timing analysis.
• Experience in high-speed Serdes design and familiar with Ethernet (802.3) standards.
• Experience developing testbenches and test cases; familiarity with UVM.
• Experience with gate-level simulations, chip bring-up, and validation.
• Proven track record of successful production tape-outs.
• Hands-on experience with STA and timing closure.
• Familiarity with DFT methodology and physical design flow.

Preferred Qualifications

• Expertise in scripting languages (Python, Tcl, Perl, Shell).
• Knowledge of UCIE, or UAlink, AXI/CHI interface is a plus.
• Strong planning and estimation skills.
• Excellent communication and leadership abilities.

The base salary range for this position is $200,000 – $230,000 a year. The base salary ultimately offered is determined through a review of education, experience, training, skills, qualifications, and location. This position is also eligible for a discretionary bonus, equity and a full range of medical and other benefits.

Credo is an Equal Opportunity Employer. We are committed to creating an inclusive environment for all employees and welcome applicants from diverse backgrounds without regard to race, color, religion, gender, sex, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis.

If you have a disability or special need that requires accommodation to navigate our website or complete the application process, email people@credosemi.com.