What are the responsibilities and job description for the Silicon Design Package Designer position at CoreTek Labs?

📢 Hiring: Silicon Design Package Designer

📍 Santa Clara, CA | Onsite

🧑 💼 Experience: 8 Years

💲 Rate: Open

🔑Key Skills:

✅Mentor / Siemens EDA

✅Cadence (PLA)

✅ Multi-layer Package Design

✅ Substrate Mfg Design & Assembly Rules

✅ SIPI (Signal & Power Integrity)

✅ Flip-Chip Package Design

✅ DRC Checks & Fixes

✅ Schematic-based Design

✅ Component Placement & Constraints

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Silicon Design Package Designer