What are the responsibilities and job description for the Virtual Platform Engineer position at Capgemini Engineering?
At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the world's most innovative companies unleash their potential. From autonomous cars to life-saving robots, our digital and software technology experts think outside the box as they provide unique R&D and engineering services across all industries. Join us for a career full of opportunities. Where you can make a difference. Where no two days are the same.
About the job you’re considering
This Virtual Platform Engineer offers the opportunity to shape next‑generation AR/VR systems by developing the high‑fidelity virtual platforms that drive early software enablement and silicon innovation. You will model advanced SoC architecture and collaborate closely with architects, designers, and firmware teams to validate and optimize custom hardware. Your contributions will inform critical architectural decisions and accelerate delivery of high‑performance silicon that powers immersive, real‑world experiences.
- Build SystemC/TLM models representing SoC components including processors, DSPs, NoCs, DMA engines, memory controllers, and custom accelerators.
- Integrate internal and vendor IP into cohesive Virtual Platforms with automated workflows that ensure complete connectivity, register accuracy, and CI enablement.
- Collaborate with architects, designers, and verification teams to deliver fast, cycle‑approximate C models for first‑party IP.
- Support hardware programs by validating evolving SoC architectures with system software and firmware teams.
- Enhance virtual platforms with instrumentation for power, performance, and architectural trade‑off analysis.
Your skills and experience
- Bachelor’s degree in computer science, Electrical Engineering, or equivalent experience.
- 7 years of industry experience, including 5 years in hardware modeling, virtual platforms, or SoC performance modeling.
- Expertise in modern C for chip‑design, EDA, simulation, and C concurrency (threads, atomics, memory ordering).
- Hands‑on experience with SystemC/TLM and virtual platform tools such as Synopsys Virtualizer, Cadence Virtual Platform, Imperas OVP, or ARM Fast Models.
- Strong understanding of processor/DSP architectures (ARM, RISC‑V, Xtensa), NoC/MMU/cache systems, and proficiency in Python for automation.
Salary : $97,700 - $203,800