What are the responsibilities and job description for the Principal Engineer, Photonics Reliability position at Ayar Labs?
Principle Engineer, Photonics Reliability
Location: San Jose (on-site)
About Ayar Labs
Ayar Labs is making the impossible possible by moving data using light. Our mission is to solve the massive data transfer bottlenecks in AI, High-Performance Computing (HPC), and cloud infrastructure. By replacing traditional electrical I/O with our breakthrough optical chiplet technology (TeraPHY™) and multi-wavelength light sources (SuperNova™), we are enabling the next generation of computing architectures.
As we scale into high-volume manufacturing, the reliability of our photonics-integrated circuits (PICs) is paramount. We are looking for a Principal Engineer, Photonics Reliability to lead our reliability strategy, focusing on Design for Reliability (DfR), foundry partnerships, and advanced physics-of-failure modeling.
The Role
In this high-impact leadership role, you will be the primary architect of the reliability roadmap for our silicon photonics platform. You will bridge the gap between R&D and high-volume manufacturing, ensuring that our optical I/O solutions exceed the stringent requirements of the world’s leading AI and data center customers. Your expertise will directly influence the design of our chiplets and the qualification of our foundry processes.
Key Responsibilities
Conduct Failure Mode and Effects Analysis (FMEA) on silicon photonics components, focusing on all Optical elements .
Collaborate with the Design and Layout teams to implement design-based mitigations for known failure mechanisms like electromigration, dielectric breakdown, and optical degradation.
Define and drive wafer-level reliability (WLR) structures and test vehicles to characterize new process nodes.
Manage reliability requirements for advanced packaging and Co-Packaged Optics (CPO) with OSAT partners.
Utilize statistical software (JMP, Minitab, or Python) to perform Weibull and Lognormal analysis on accelerated life testing (ALT) and degradation data.
Model the impact of environmental stressors (thermal cycling, humidity, high-power optical loads) on the long-term performance of the Phontics chiplet.
Develop corrective action plans (CAPA) to resolve reliability issues discovered during qualification or in-field deployment.
Required Qualifications
Note To Recruiters
Principals only. We are not accepting resumes from recruiters for this position. Remuneration for recruiting activities is only applicable subject to a signed and executed agreement between the parties. Please don’t send candidates to Ayar Labs, and do not contact our managers.
Ayar Labs is an Equal Opportunity Employer and is strongly committed to all policies which will afford equal opportunity employment to all qualified persons without regard to age, sex, national origin, race, color, ethnicity, creed, religion, gender identity, sexual orientation, disability, veteran status, or any other characteristic protected by law. It is the policy of Ayar Labs to provide reasonable accommodation when requested by a qualified applicant or employee with a disability, unless such accommodation would cause an undue hardship. Veterans are more than welcome and encouraged to apply.
Location: San Jose (on-site)
About Ayar Labs
Ayar Labs is making the impossible possible by moving data using light. Our mission is to solve the massive data transfer bottlenecks in AI, High-Performance Computing (HPC), and cloud infrastructure. By replacing traditional electrical I/O with our breakthrough optical chiplet technology (TeraPHY™) and multi-wavelength light sources (SuperNova™), we are enabling the next generation of computing architectures.
As we scale into high-volume manufacturing, the reliability of our photonics-integrated circuits (PICs) is paramount. We are looking for a Principal Engineer, Photonics Reliability to lead our reliability strategy, focusing on Design for Reliability (DfR), foundry partnerships, and advanced physics-of-failure modeling.
The Role
In this high-impact leadership role, you will be the primary architect of the reliability roadmap for our silicon photonics platform. You will bridge the gap between R&D and high-volume manufacturing, ensuring that our optical I/O solutions exceed the stringent requirements of the world’s leading AI and data center customers. Your expertise will directly influence the design of our chiplets and the qualification of our foundry processes.
Key Responsibilities
- Design for Reliability (DfR)
Conduct Failure Mode and Effects Analysis (FMEA) on silicon photonics components, focusing on all Optical elements .
Collaborate with the Design and Layout teams to implement design-based mitigations for known failure mechanisms like electromigration, dielectric breakdown, and optical degradation.
- Foundry & Ecosystem Reliability
Define and drive wafer-level reliability (WLR) structures and test vehicles to characterize new process nodes.
Manage reliability requirements for advanced packaging and Co-Packaged Optics (CPO) with OSAT partners.
- Advanced Reliability Modeling
Utilize statistical software (JMP, Minitab, or Python) to perform Weibull and Lognormal analysis on accelerated life testing (ALT) and degradation data.
Model the impact of environmental stressors (thermal cycling, humidity, high-power optical loads) on the long-term performance of the Phontics chiplet.
- Failure Analysis & Root Cause
Develop corrective action plans (CAPA) to resolve reliability issues discovered during qualification or in-field deployment.
Required Qualifications
- Education: PhD or Master’s degree in Electrical Engineering, Physics, Materials Science, or a related field.
- Experience: 10 years of semiconductor reliability experience, with at least 5 years focused specifically on Silicon Photonics or Optoelectronics.
- Foundry Knowledge: Deep understanding of foundry process flows and the reliability challenges unique to photonics (e.g., optical power handling, aging, and thermal management in CPO).
- Modeling Mastery: Proven track record in developing aging models (Arrhenius, Coffin-Manson, etc.) for semiconductor or photonic devices.
- Standards Expertise: Familiarity with JEDEC, Telcordia (GR-468), and MIL-STD qualification standards.
- Hands-on experience with Python for automated reliability data pipelines.
- A "startup mindset"—the ability to thrive in a fast-paced environment where you must often build processes from the ground up.
Note To Recruiters
Principals only. We are not accepting resumes from recruiters for this position. Remuneration for recruiting activities is only applicable subject to a signed and executed agreement between the parties. Please don’t send candidates to Ayar Labs, and do not contact our managers.
Ayar Labs is an Equal Opportunity Employer and is strongly committed to all policies which will afford equal opportunity employment to all qualified persons without regard to age, sex, national origin, race, color, ethnicity, creed, religion, gender identity, sexual orientation, disability, veteran status, or any other characteristic protected by law. It is the policy of Ayar Labs to provide reasonable accommodation when requested by a qualified applicant or employee with a disability, unless such accommodation would cause an undue hardship. Veterans are more than welcome and encouraged to apply.
Salary : $200,000 - $240,000