What are the responsibilities and job description for the Kernel Scheduler Engineer, Core OS position at Apple?
The Darwin Scheduler team within Apple's Core OS organization is responsible for the delivery of a high-quality and performant kernel for every Apple product. Our software runs on your wrist in watchOS; in your pocket with iOS; on your desk in macOS; and on the high-performance systems driving the creative industry. The team focuses on key kernel technology areas such as CPU scheduling, power management, and threading models which are central to delivering industry-leading performance and battery life.
We are looking for a highly skilled Systems Engineer to join us in designing the next generation of Apple’s kernel scheduler. As one of the few vertically integrated systems shops remaining, our engineers have the unique opportunity to influence the entire stack—from silicon design to the behavior of the world's most advanced applications.
As a Kernel Engineer on the Scheduler team, you will drive the evolution of the XNU kernel to support the expanding capabilities of Apple Silicon. You will work on the heart of the operating system, designing scheduling policies that balance extreme performance with aggressive power efficiency.
We are looking for a self-driven engineer who thrives on navigating complex system interactions. You will be responsible for identifying bottlenecks in highly parallel workflows, optimizing the interaction between hardware and software, and ensuring our OS scales gracefully from low-power embedded devices to massive high-performance workstation architectures.
Minimum Qualifications:
BS/MS/PhD in Computer Science, Computer Engineering, or equivalent experience.
Technical Proficiency: Fluency in C and C
Problem Solving: Proven track record of debugging complex system issues (deadlocks, race conditions, performance regressions) and driving ambiguous problems to resolution.
Preferred Qualifications:
Systems Expertise: 2 years of experience in Operating Systems development, with deep knowledge of kernel internals, and process/thread scheduling.
Concurrency: Strong understanding of SMP/AMP architectures, synchronization primitives, lock-free algorithms, and cache coherency.