Demo

ASIC Digital Design Engineer Lead

Apple
Cupertino, CA Other
POSTED ON 7/7/2026
AVAILABLE BEFORE 9/7/2026
Are you a leader? Do you want to utilize your engineering background to make big things happen? Can you influence, connect, get results and communicate effectively? Can you deliver on a predictable and dynamic schedule? We have an extraordinary opportunity for senior level engineers to drive and lead technical engagements between Apple and silicon suppliers working on groundbreaking technologies. The Custom Silicon Management Group provides critical custom silicon for all mobile products including iPhone, iPad, and AppleTV. Apple is looking for remarkable applicants for our Display Digital Design lead role to work with multi-functional teams and external vendors to define, develop and productize the next generation of devices. Imagine yourself at the center of our hardware development effort where you will collaborate with all subject areas, playing a strategic role of getting functional products to millions of customers quickly. You will have the opportunity to integrate and come-up with new insights, as well as work with vendors to promote efficiency in the Silicon community. We value your technical understanding of digital design principles. Here are the main responsibilities of this role: - Assist in architecture, implementation, verification, emulation and validation of custom silicon. - Trade off specific issues against system limitations. - Help improve engineering requirement specification documents for custom silicon. - Work with internal teams to assure that documents meets needs. - Work with external vendors in developing micro-architecture, verification and emulation of custom silicon. - Drive vendor’s methodology to meet Apple standards. - Target to achieve bug free first silicon to meet ambitious product schedules. Minimum Qualifications: BS degree Digital design engineering experience Preferred Qualifications: 10 Years of relevant industry experience. Hands-on experience with FPGA emulation, silicon bring-up, characterization and debug. Experience with mixed signal design. Experience with display interconnect standards such as MIPI, DP, HDMI. Experience with display pipeline elements and/or TCON development. Good verbal and written communication skills.

Hourly Wage Estimation for ASIC Digital Design Engineer Lead in Cupertino, CA
$117.00 to $129.00
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