What are the responsibilities and job description for the Lead SoC Architect position at Anodize?
Summary
We’re a well-funded, stealth startup building a next-generation, end-to-end computing platform powered by a custom, high-performance edge SoC on an advanced process node. By integrating flagship compute IP into an industry-leading design, we are building the optimized silicon foundation for our software platform from the ground up.
We’re building a tight-knit, experienced in-house team to drive engineering outcomes and partner with a Tier-1 ASIC design house through the process. As our Lead SoC Architect, you will own the top-level system architecture, shaping the blueprint of our silicon and providing technical direction for both our core engineering team and external partners.
Responsibilities
We’re a well-funded, stealth startup building a next-generation, end-to-end computing platform powered by a custom, high-performance edge SoC on an advanced process node. By integrating flagship compute IP into an industry-leading design, we are building the optimized silicon foundation for our software platform from the ground up.
We’re building a tight-knit, experienced in-house team to drive engineering outcomes and partner with a Tier-1 ASIC design house through the process. As our Lead SoC Architect, you will own the top-level system architecture, shaping the blueprint of our silicon and providing technical direction for both our core engineering team and external partners.
Responsibilities
- Own the SoC Architecture: Own the overall SoC architecture, translating product requirements into executable engineering blueprint, and ensure our implementation partner’s frontend team is setting the right bar.
- Drive System Integration: Collaborate seamlessly with the team to integrate compute, fabric, serdes, etc.
- Manage Architectural Trade-offs: Take a data-driven approach to finding the balance between thermal constraints, performance goals, and power efficiency.
- Guide Execution: Serve as the primary technical bridge to our ASIC partner. You will actively audit their floorplanning, timing closure, and routing strategies to ensure the physical implementation preserves our architectural intent.
- 10 years of system-level design experience for complex SoCs, with a history of successful tapeouts on advanced nodes.
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or equivalent experience.
- Deep, practical knowledge of the Arm architecture and AMBA protocols (CHI, AXI, ACE).
- Highly comfortable writing meticulous specifications and diving into design details alongside our vendors to overcome complex implementation roadblocks, all while ensuring our aggressive performance expectations can be met.