Design Verification Engineer - Methodology

Design Verification Engineer - Methodology Austin, Texas Engineering 72410 USD $171,200.00/Yr. USD $256,800.00/Yr. Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: This is a technical position. Be part of the world's leading Design Verification Methodology team developing applications for functional and behavior verification of state-of-the-art graphics accelerators, generative AI (Artificial Intelligence) accelerators, servers, and Systems on Chips (SoCs).  In this role, you will be analyzing methodology flows and data, identify the pain points in various design, pre and post Silicon verification efforts, and adapt this methodology to address these pain points. Also, as the designs and their methodologies mature, you will be ensuring methodologies evolve to match up scalability. You will coordinate with Hardware Architects, Logic Designers, experts, and technical leaders from various validation teams, to tackle functional issues present in the proposed methodology and tool. THE PERSON: Will demonstrate strong analytical thinking and problem-solving skills with excellent attention to detail. Will have effective communication and writing skills, Will have good teamwork and interpersonal skills, .   KEY RESPONSIBILITIES: Deploying Industry-Leading Verification Methodologies such as UVM and Formal Verification. Driving technical innovation to improve AMD’s capabilities in IP validation/verification, including tool and script development, technical and procedural methodology improvement, and various internal and cross-functional technical initiatives. Developing Testbenches and Verification Components such as UVCs, models, BFMs, and Re-usable Verification Environments. Working closely with supporting teams in design, diagnostics, emulation, firmware, and driver to adopt and deploy new verification methodologies and tools. PREFERRED EXPERIENCE: DV planning for Metric Driven Verification and TB architecture. Deep knowledge of DV infrastructure, Make flow and other automation flows, shell, Perl, python, ruby. Machine Learning is a plus. Prior experience with System Verilog HVL and UVM methodology is a plus Familiarity with emulation and post-Si validation is a plus. ACADEMIC CREDENTIALS:  Bachelor, Master or PhD in Electrical Engineering, Computer Engineering or Computer Science.  LOCATIONS:  Austin, TX  #LI-SL3 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Salary : $171,200 - $256,800