What are the responsibilities and job description for the SoC Verification Engineer position at ALKU?
Location: Local to Chandler, AZ
Duration: 6 Month Contract
SoC Verification Engineer
Background: This client is looking for a SoC Verification Engineer.
- Own block-to-full-chip functional verification of next-generation ARM/RISC-V based SoCs targeting 3nm/2nm nodes
- Build and maintain scalable UVM verification environments (SystemVerilog UVM) including scoreboards, checkers, functional coverage, and assertions
- Develop directed and constrained-random testbenches for complex IPs: PCIe Gen5/6, CXL 3.0, LPDDR5/6, HBM3, NoC, CPU/GPU clusters, and high-speed SerDes
- Drive coverage closure (functional, code, assertion, and vertical/horizontal reuse) to SoC level)
- Work closely with design, architecture, and software teams to debug failures and verify corner cases
- Integrate and verify third-party VIPs (PCIe, DDR, USB, etc.) and create reusable verification components
- Contribute to verification methodology improvements and automation (Python, Perl, TCL, Makefiles, CI/CD flows)
Required Experience:
- 5-10 years of hands-on SoC/IP verification experience
- Expert-level SystemVerilog/UVM; proven track record of full-chip tape-out(s)
- Deep knowledge of high-speed protocols: PCIe Gen5/6 (preferred), CXL, LPDDR5/6, HBM, or UCIe
- Experience with coverage-driven verification, assertions (SVA), and formal methods is a big plus
- Familiarity with emulation (Palladium, Zebu) and FPGA prototyping flows