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Mechanical Engineer (CMOS/SiPh) - 3x Openings

Advantest
San Jose, CA Full Time
POSTED ON 6/5/2026
AVAILABLE BEFORE 7/4/2026

Mechanical Engineer, CMOS/SiPh (3 Openings)

 

Advantest is looking for a Mechanical Engineer, for our San Jose, California office, to design, develop and support mechanical solutions, for customers in the Standard Semiconductor (CMOS) and Silicon Photonics (SiPh) design/development and manufacturing ecosystems.

 

This person will work with both local and remote Advantest and Customer teams and will deliver solutions on time, while exceeding customer expectations.

 

Duties and Responsibilities

·        Provide mechanical design support, including 3D modeling of parts and assemblies as well as generating related drawings.

·        Contribute to the planning and execution of Design of Experiments (DOEs).

·        Prepare and deliver technical presentations covering design concepts, reviews and DOE.

·        Support planning and implementation of design validation and product qualification activities, which may involve hands-on tasks, such as prototype fabrication and testing.

·        Support product definition and structuring in the Advantest PLM (Product Lifecycle Management) system

·        Communicate effectively and timely, in an organized and structured fashion, using collaboration/communication tools like Teams/SharePoint/Jira/Confluence/Webex

 

Education, Requirements & Skills

·        Be a Team player

·        BS or MS in Mechanical Engineering.

·        Minimum 5-year experience on 3D CAD modeling and 2D drawing, using commercial platforms.

·        Proficiency in SolidWorks Simulation (FEA) for displacement, stress, and strain analysis.

·        Strong communication, presentation, and documentation skills.

·        Solid Microsoft Office suite skills.

·        Must be able to function independently, possess sharp problem-solving skills and identify recovery plans from unexpected setbacks.

·        Must be able to successfully perform in an intense work environment with dynamically changing priorities.

 

Preferred Qualifications

·        Knowledge of semiconductor manufacturing and testing ecosystems

·        Experience designing ATE/CMOS interfaces (loadboards, probe cards, sockets, change kits)

·        Silicon Photonics system integration experience

·        Hands-on with ATE testers, handlers, probers, SLT

·        Advantest V93000 SOC testers experience

·        ATE handler experience

·        WindChill (PLM) experience

Salary.com Estimation for Mechanical Engineer (CMOS/SiPh) - 3x Openings in San Jose, CA
$115,169 to $138,752
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