Sub-System Integration and Verification Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING 

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.  

The Role:

As a Sub-System Integration and Verification Engineer, you will play a key role in integrating complex IP blocks into SoC subsystems and ensuring their functional correctness through advanced verification methodologies. You will collaborate closely with hardware and firmware teams to validate subsystem-level functionality, performance, and security features. This position offers exposure to cutting-edge SoC architectures, hardware/software co-design, and innovative verification techniques.

The Person:

We are seeking an engineer with a strong foundation in computer architecture and SoC design principles. The ideal candidate demonstrates problem-solving ability, technical expertise, and effective communication skills to work across diverse teams. We value individuals who are detail-oriented, adaptable, and committed to delivering high-quality results.

Key Responsibilities:

• Integrate multiple IP blocks into SoC subsystems and ensure seamless functionality across hardware and firmware interfaces.
• Develop and execute subsystem-level verification plans, including functional, performance, and security validation.
• Build and maintain UVM/SystemVerilog-based testbenches and leverage C-DPI for hardware/software co-verification.
• Collaborate with IP design teams to influence micro-architecture decisions and ensure subsystem-level requirements are met.
• Create and maintain infrastructure for subsystem integration, simulation, and debug workflows.
• Drive verification closure by achieving functional coverage, code coverage, and meeting quality metrics.
• Utilize FPGA prototypes and emulation platforms for early integration and validation.
• Participate in subsystem specification reviews and contribute to HW/FW co-design strategies.

Preferred Experience:

• Proven experience in SoC integration and verification at subsystem or IP level.
• Strong understanding of UVM methodology, SystemVerilog, and C-DPI co-verification techniques.
• Familiarity with standard bus protocols (AXI, AHB, AMBA) and interconnect architectures.
• Experience with firmware development and debug on embedded processors.
  Proficiency in scripting languages (Python, Perl, or similar) for automation and infrastructure development.
• Knowledge of ASIC verification tools, simulation environments, and power-aware verification.

Academic Credentials:

• Bachelor’s or Master's degree in Electrical Engineering, Computer Engineering or equivalent  preferred

Location:

Folsom, Ca

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.