High Speed SR Signal and Power Integrity Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING 

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.  

THE ROLE: 

As a Signal Integrity Engineer in Networking Technology & Solutions Group (NTSG), you will be responsible for ensuring that AMD’s next-generation products deliver industry-leading reliability, performance, and efficiency. This role involves analyzing, modeling and validating the complex interconnects of high-speed Serializer/Deserializer (SerDes) channel.

THE PERSON:

In this role, you will closely collaborate with Silicon IP team, ASIC packaging team, PCB team, System Architect and external partners/suppliers to meet the most demanding SerDes requirements while ensuring the manufacturability.   

KEY RESPONSBILITIES: 

• Model and simulate the end-to-end SerDes channels including transceivers, IC package, PCB and connectors/cables across boards
• Utilize industry-standard tools and methodologies to perform a variety of time domain and frequency domain signal integrity analysis, e.g. full-wave EM extractions, SPICE simulations, IBIS-AMI simulations, Channel Operation Margin (COM) analysis, etc.  
• Identify the high-speed link qualities such as loss, reflection and crosstalk.
• Interpret the simulation and/or measurements results to provide the design guidelines such as materials, stack-up, routings lengths, package and PCB layout optimization, and connectors/cables vendor engagements.
• Execute Design of Experiments (DOE) sweeping to statistically evaluate the signal integrity qualities across process variations, like silicon corners, trace impedance, routing length, terminations, etc.
• Support lab validation and debugging to correlate with the simulation data
• Collaborate with cross-functional teams to drive product development while keeping projects on schedule and within scope. 
• Stay at the forefront of signal integrity innovations and high-speed design technologies, ensuring that AMD continues to lead the industry

QUALIFICATIONS:

• Knowledge of high-speed system interconnects and major interfaces (PCIe, Ethernet, DDR, etc.)
• Proficiency in SI simulation tools (Keysight ADS, Cadence PowerDC/PowerSI, Ansys HFSS)
• Hands-on experience with lab testing tools (TDR, VNA, high-speed oscilloscopes)
• Excellent problem-solving and cross-functional collaboration skills

ACADEMIC CREDENTIALS:

Master’s degree in electrical engineering, Computer Engineering, or related field

LOCATION:

Santa Clara, CA

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This role is not eligible for VISA sponsorship 

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.