Client DDR Memory Sub-System Validation Engineer

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SYSTEMS DESIGN ENGINEER  

THE ROLE:  

We are looking for a dynamic, energetic Senior Systems Design Engineer to join our growing team. Within the client platform engineering team, this senior memory systems engineer will work with internal engineering teams and external partners in an exciting lab environment to enable, debug and qualify the latest memory technologies coming to the market for use with leading edge AMD client SOC’s. The team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. 

THE PERSON:  

 An engineer at the core that is driven to learn new memory technologies, working across silicon design, validation, and memory partners to deliver robust system memory solutions.

KEY RESPONSIBILITIES:  

• Develop technical test plans to support platform-based APU silicon bring-up and the validation execution of DDR5 and LPDDR5x memory components in partnership with memory controller and PHY designers, BIOS developers, platform design engineers and external partners.
• Enable SOC DDR5 and LPDDR5x memory features for new client APU’s as part of a technical platform enablement team.
• Execute electrical and functional DDR5 and LPDDR5x memory test plans to verify system functionality to product specification using hardware and software validation tools.
• Develop scripts and tools to support system memory silicon validation, characterization, and analysis.
• Analyze electrical and functional test data to drive into production SOC and system solution decisions.
• Debug of system memory issues found during pre-silicon emulation, bring up, validation, and production phases of SOC programs.

PREFERRED EXPERIENCE:  

• Experience in system memory validation and / or SOC IP electrical characterization, preferably in DDR4/5 or LPDDR4x/5/5x
• Technical expertise in the development and execution of platform level electrical and functional test plans.
• Experience in software development including using languages such as Python & Ruby to be used in system memory silicon validation test plan development & execution.
• Experience in the debug of I/O interfaces such as DDR4/5 and LPDDR4x/5/5x
• In-depth knowledge of PC architectures and system technologies.
• Experience using oscilloscopes, logic/protocol analyzers, reading schematics and layout design files used in system memory analysis and debug.
• Experience with windows and linux operating systems
• Good written and oral communication skills, with the ability to communicate with a variety of engineering disciplines and management. 

ACADEMIC CREDENTIALS:  

• Bachelors or Masters degree in electrical or computer engineering 

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Benefits offered are described:  AMD benefits at a glance.

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