What are the responsibilities and job description for the ASIC Design Engineer position at Advanced Micro Devices, Inc?
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We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
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THE ROLE:
This role is a unique opportunity to be at the forefront of new product development at AMD where you will have great influence and responsibility for technology design enablement, product development, and NPI bring-up of ASIC products from conception to production.
You will bridge the gap between design, manufacturing, internal design teams, and external customers to optimize ASIC designs for customer's needs.
THE PERSON:
The ideal candidate will be an expert in IC design and manufacturing including analog/digital IP integration, chip design, silicon process or packaging technologies. A good understanding of ASIC design flow, foundry technology PDK, device physics, reliability and silicon chip manufacturing is essential. The candidate must also demonstrate effective communication, good interpersonal skills and be able to work seamlessly with design teams, foundry partners, package/assembly vendors, IP providers and validation teams. Typically, the candidate will hold a degree in engineering or physical science with over 15 years of relevant experience in the field.
JOB RESPONSIBLITIES:
- Responsible for technology definitions and design-technology co-optimization (DTCO) of ASIC products in advanced nodes
- Co-work with design, CAD & PDK teams to accomplish robust IP & ASIC designs
- Coordinate testchip design and tapeout for IP validation prior to NPI phase
- Responsible for product WAT analysis, performance correlation and yield analysis during NPI in collaboration with foundry and design teams
- Assist ASIC technology roadmap exploration to meet end customer requirements
KEY QUALIFICATIONS:
- Working knowledge of chip design and analog/digital IPs integration
- Working knowledge of digital P&R design and verification
- Working knowledge of advanced semiconductor technology nodes including FinFET and Gate-All-Around technology such as 3nm, 2nm & beyond
- Experience with major EDA tools for device model, layout, circuit simulation, parasitic extraction, and physical verification
- Exceptional data analysis, problem solving, and communication skills
ACADEMIC CREDENTIALS:
- Bachelor degree in engineering or physical science, preferably with advanced degree (MS or PhD)
LOCATION: San Jose, Ca
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Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
