Hardware Design Verification Engineer (SystemVerilog)

HIRING ASAP! If interested in more information/direct feedback, please reach out to me directly at ghilson@actalentservices. com and attach your resume and contact information.

Below are some details about the position:

• BENEFITS: YES
• PAY: $80-90 an hour depending on experience
• SCHEDULE: Remote (100%)
• DURATION: 12 month contract with potential for extension

Role Overview

The Hardware Design Verification Engineer will support the validation of accelerated networking hardware IP. This role focuses on ensuring design functionality and feature completeness through comprehensive test coverage within an existing SystemVerilog and UVM verification environment. The team is responsible for hardware design verification of accelerated networking IP, ensuring all features are fully validated through robust and thorough testing.

Key Responsibilities

• Develop, execute, and maintain verification test plans
• Build and run simulations using SystemVerilog and UVM
• Analyze results, debug failures, and ensure coverage closure
• Validate hardware functionality against design specifications
• Collaborate cross-functionally with hardware design teams
• Support prototype testing and system-level validation as needed

MUST HAVES:

• Bachelor’s degree in Engineering or related field
• 10 years of hardware design verification experience
  • Strong hands-on experience with:
  • SystemVerilog
• UVM (Universal Verification Methodology)
• Solid understanding of RTL design and verification methodologies
• Proven ability to execute within an existing verification environment
• Strong debugging and problem-solving skills

NICE TO HAVES:

• Experience verifying complex hardware systems (networking experience is a plus, but not required)
• Ability to quickly ramp up and work independently
• Strong experience with:
  • Test plan execution
  • Debugging and scenario validation
• Proven collaboration with design and cross-functional teams
• Flexible availability (open to extensions up to 18 months preferred)
• Advanced degree (e.g., Master’s) with relevant industry experience

Disqualifiers:

• Lack of hands-on SystemVerilog and UVM experience
• No hardware design verification bckgrnd
• Inability to commit to the full 12-month assignment
• Insufficient technical depth for a Level 5 (10 years experience) role

This is a Contract position based out of Redmond, WA.

The pay range for this position is $80.00 - $90.00/hr.

Eligibility requirements apply to some benefits and may depend on your job classification and length of employment. Benefits are subject to change and may be subject to specific elections, plan, or program terms. If eligible, the benefits available for this temporary role may include the following:
• Medical, dental & vision
• Critical Illness, Accident, and Hospital
• 401(k) Retirement Plan – Pre-tax and Roth post-tax contributions available
• Life Insurance (Voluntary Life & AD&D for the employee and dependents)
• Short and long-term disability
• Health Spending Account (HSA)
• Transportation benefits
• Employee Assistance Program
• Time Off/Leave (PTO, Vacation or Sick Leave)

This is a fully remote position.

This position is anticipated to close on Jul 9, 2026.

About Actalent

Actalent is a global leader in engineering and sciences services and talent solutions. We help visionary companies advance their engineering and science initiatives through access to specialized experts who drive scale, innovation and speed to market. With a network of almost 20,000 consultants and 5,000 clients across the U.S., Canada, Asia and Europe, Actalent serves many of the Fortune 500. We are proud to be an Engineering News-Record (ENR) Top 500 Design Firm for our engineering design services and a ClearlyRated Best of Staffing® winner for both client and talent service.

The company is an equal opportunity employer and will consider all applications without regard to race, sex, age, color, religion, national origin, veteran status, disability, sexual orientation, gender identity, genetic information or any characteristic protected by law.

If you would like to request a reasonable accommodation, such as the modification or adjustment of the job application process or interviewing process due to a disability, please email actalentaccommodation@actalentservices.com for other accommodation options.

San Francisco Fair Chance Ordinance: Pursuant to the San Francisco Fair Chance Ordinance, for all positions located in the city and county of San Francisco, we will consider for employment qualified applicants with arrest and conviction records.

Massachusetts Lie Detector: It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.

Use of Artificial Intelligence (AI): We may use Artificial Intelligence (AI) to support parts of our hiring process, including sourcing, screening, and evaluating candidates. AI helps assess applications and qualifications, but final decisions are made by our hiring team. By applying, you acknowledge and agree that your application may be reviewed using AI tools.

Salary : $80 - $90