What are the responsibilities and job description for the CPU Design Verification Engineer position at ACL Digital?
We are seeking a Design Verification Engineer to develop and maintain UVM-based verification environments for CPU subsystems.
Responsibilities:
- Verify CPU cores, pipelines, and instruction execution
- Implement constrained-random testing and advanced testbench architectures
- Integrate Instruction Set Simulators (ISS) with DV environments
- Debug complex functional issues across hardware and testbench
Requirements:
- 5 years design verification experience
- Strong SystemVerilog and UVM skills
- Experience in CPU/processor verification and testbench architecture
Preferred:
- Familiarity with ISS (e.g., Spike)
- Experience with random instruction generators (e.g., Sting)
- Knowledge of processor software toolchains