Experience:

BS degree in Physics, EE, Mat. Sci. (or related engineering discipline) with classwork including semiconductor physics and electronics. Experience with electronic component reliability JEDEC/AEC-Q100 and associated standards a plus. Wafer level reliability experience also a plus.

Responsibilities:

• Design and debug hardware for biased product reliability evaluation
• Evaluate and Qualify CMOS Imaging Sensor (CIS) products for mass production
• Collaborate with foundries to assess, characterize, and improve CIS processes
• Work with R&D, design, process, package, and product engineers to qualify new process technologies, and ensure quality of design performance for advanced CIS processes to meet customer reliability requirements
• Issue internal product qualification and evaluation project summaries
• Make meeting presentations to discuss project results and product issues
• Prepare and issue product reliability release reports

Requirements:

• BS degree in Physics, EE, Mat. Sci. (or equivalent) with classwork in electronics and semiconductor physics
• Ability to design component reliability hardware and develop reliability infrastructure
• Some working knowledge of CMOS devices
• Some experience in IC components and IC package reliability qualification desired
• Wafer level reliability knowledge preferred
• Familiarity with foundry FEOL and BEOL reliability tests/metrics
• Prior exposure to component engineering a plus
• Working knowledge of commercial and automotive reliability standards (JEDEC, AEC)
• Familiarity with IC components reliability failure modes, mechanisms, and failure analysis techniques preferred
• Good social and communications skills - comfortable working in multicultural teams